March 19, 2026
In the PCB prototyping and manufacturing process, layout is often the critical factor that determines a product’s success or failure. Whether it’s signal interference, power management, or impedance matching, every detail puts an engineer’s skills to the test. Today, we’ve compiled an authentic list of “50 Common PCB Layout Issues” to provide you with the most practical guidance for your hardware design journey!
Impedance matching of signal traces and spatial isolation from other signals are very important. For digital high-frequency signals, using differential pairs yields better results.
For low-frequency signals, vias have little impact. However, for high-frequency signals, the number of vias should be minimized. If routing space is truly insufficient, consider increasing the number of layers (using a multilayer board).
It's not about quantity, but about placing decoupling capacitors with "appropriate capacitance values" in suitable locations. For example, place them near the power pins of analog components, and use capacitors with different values to filter noise at different frequencies.
Using blind or buried vias is an effective method to increase multilayer board density, reduce layer count and board size, and decrease the number of plated through-holes. However, comparatively, through-holes are easier to manufacture and lower in cost, so they are still commonly used in general designs.
Reasonable component placement, sufficient margin in power trace widths, consideration of characteristic impedance for high-frequency signals, and clean and simple routing for low-frequency signals.
If you have a high-frequency (>20MHz) signal line, with significant length and quantity, then this analog high-frequency signal requires at least two layers: one signal layer and one large-area ground layer, and the signal layer needs sufficient vias connected to the ground layer. The purpose is: This provides a complete transmission medium and impedance matching; the ground layer isolates the analog signal from other digital signals; because of the many vias and the large ground plane, the return loop can be made sufficiently small.
First, clarify if the signal input connector is for analog signals. If so, it's recommended that the power supply layout minimizes its impact on the signal integrity of the analog section. Consider the following points:
Generally, refer directly to the chip's datasheet. Manuals for mixed-signal chips from companies like ADI usually recommend grounding schemes. Some suggest common grounding, others suggest isolation, depending on the chip's internal design.
The calculation approach for differential pairs: If transmitting a sinusoidal signal, a length difference equal to half its transmission wavelength results in a 180-degree phase shift, causing the two signals to cancel completely. This length difference is the limit; the actual length difference must be strictly less than this value.
Serpentine routing serves different functions depending on the application:
Good EMI/EMC design must consider component placement, stack-up arrangement, critical routing, and component selection early in the layout phase. For example: Clock generators should not be placed near external connectors. High-speed signals should be routed on inner layers whenever possible. Pay attention to characteristic impedance matching and the continuity of the reference plane to minimize reflections. Consider the frequency response when selecting decoupling capacitors. Pay attention to the return path of high-frequency signals, keeping the loop area as small as possible to reduce radiation. Splitting the ground plane can also help control the range of high-frequency noise.
Impedance matching is generally designed based on information provided by the manufacturer. This requires considering many factors, such as various parameters of the PCB material, transmission line models built from these parameters, component specifications, etc.
Directly sharing is generally not recommended. Debugging such a system can be complex and difficult.
0402 is common in mobile phones; 0603 is common in general high-speed signal modules. The principle is: smaller packages have smaller parasitic parameters. Of course, the high-frequency performance of the same package can vary greatly between manufacturers; it is recommended to use high-frequency specific components in critical locations.
This should be considered comprehensively. Typically, routing is done after ensuring the component placement is reasonable.
The focus is on "stack-up planning"—how to assign signal, power, and ground layers. The general principle is: Analog signals and analog ground should at least have a dedicated layer, and a dedicated power layer is also recommended.
Using multilayer boards first provides a "solid ground plane," and also increases signal layers for easier routing. For applications where the CPU controls external memory, the interaction frequency should be considered. If the frequency is high, a solid ground plane must be ensured, and signal traces must maintain equal length.
This is difficult to distinguish in practice. We can only start from the PCB routing side, minimizing additional noise introduced by the routing as much as possible.
For a 300MHz signal, impedance simulation software must be used to calculate the trace width and the distance from the trace to the ground layer. The width of power traces is determined by the current magnitude. In mixed-signal PCBs, the ground is typically not "traced," but uses an entire solid plane (copper pour).
Heat dissipation is primarily achieved through "reducing heat generation" and "accelerating heat dissipation." There are three main heat sources in a PCB: heat from electronic components, heat from the PCB itself, and externally transferred heat. Component heating is the primary cause.
It's difficult to state a simple proportional relationship because their transmission models differ (one is surface transmission, one is vertical transmission). It is recommended to use impedance calculation software to make the via impedance as consistent as possible with the transmission line impedance.
Generally, a properly implemented internal ground plane is sufficient.
Try to place multiple ADCs together and connect analog and digital ground at a "single point" under the ADCs. Regarding the multiplexers (MUX), it depends on the switching speed of the MUX and ADC. Typically, ADCs are faster, so the connection point is recommended to be under the ADC. For safety, a ferrite bead footprint can be预留, allowing for flexible selection during debugging.
Mixed-signal systems certainly have multiple types of grounds, and ultimately they are usually connected at a single point. The purpose is to achieve "equipotentiality," providing a common ground reference level for all signals.
Analog and digital circuits should be placed in different areas, ensuring that the return current for analog circuits stays in the analog area, and digital return current stays in the digital area. The core principle is: Prevent digital signal return current from flowing through the analog ground, avoiding mutual interference.
The main requirements for the ground in analog circuits are: integrity, small loop area, and impedance matching. For digital signals, if the speed is not high, the requirements are lower. However, for high-speed digital signals, impedance matching and ground integrity must also be considered.
This must be designed based on the specific application and the chip's datasheet recommendations. Typically, small-value (0.1uF) high-frequency decoupling capacitors need to be placed closest to the chip's power pins.
Yes, they need to be equal in length, and the same approach is used in RF circuits.
High-frequency circuit design needs to consider the impact of many parasitic parameters. At high frequencies, many parameters that can be ignored in ordinary circuits can no longer be ignored, and "transmission line effects" must be considered.
The most fundamental solution is to increase the number of signal layers in the PCB, providing more routing channels and thus reducing the need for layer changes via vias.
A rule of thumb: 0.15 × trace width (mm) ≈ allowable current (A). The board manufacturer's copper weight specifications must also be considered.
This is not necessary, but analog and digital circuits should be placed in "separate zones."
As a rule of thumb: On the same signal line, try not to exceed "two" vias.
Digital circuits, due to their complex frequency components, are definitely interference sources. Common solutions include: reasonable component placement/zoning, thorough power decoupling, and independent PCB layers. If interference is significant or the analog part is extremely sensitive, adding a metal shielding cover is recommended.
Analyze the impact of parasitic parameters on circuit performance. If the impact is significant enough to be ignored, it must be addressed and eliminated.
Since power and ground layers are internal, ensure there are no "floating" ground or power planes. Verify that ground vias are properly connected to the ground layer. Additionally, important signals should have预留 test points for convenient measurement during debugging.
Maintain sufficient spacing between signal traces, avoid parallel routing, or isolate them through grounding, adding shielding, etc.
It is difficult to achieve because in double-layer board layouts, various signal traces almost occupy all routing space.
Board thickness is very important for "impedance matching." When a PCB manufacturer calculates impedance for you, they need the specified board thickness and stack-up information, and then fabricate according to your requirements.
This depends on whether the parasitic capacitance has a non-negligible impact on the signal. If it cannot be ignored, the layout must be re-evaluated.
If a single LDO must supply both digital and analog circuits, it is recommended to connect it to the "analog power" first. Then, after LC filtering the analog power, supply it to the "digital power."
Analog Vcc is filtered (e.g., via LC) to obtain digital Vcc. A ferrite bead is typically used between analog ground and digital ground.
The most core principle is: All routing (including surrounding components) and the underlying ground plane must maintain "symmetry."
The best physical method is adding a shielding cover. In circuit design, for example, adding an RFI filter at the front end of an instrumentation amplifier (INA) can effectively filter out radio frequency interference.
For digital chips, it generally depends on the situation. For analog chips, it depends on whether the transmission line effect is significant enough to affect the chip's performance.
If there are already solid ground and power planes internally, the top and bottom layers typically do not need large-area copper pours, as this could cause antenna effects.
There are many professional simulation software packages available. Software like Multisim can also be used to辅助 simulate the effects of resistors and capacitors.
This depends on the component specifications. Usually, the impedance of component pins is provided in the datasheet and generally has little relation to the width of the external traces.
Length matching issues usually must be solved by using serpentine traces. Most modern PCB Layout software has automatic length matching functions, making the operation very convenient.
The ground pins inside the chip are usually all connected together. However, the ideal single-point grounding strategy is: understand the location of the boundary between the chip's analog and digital sections, and on the corresponding boundary on the PCB, design a dedicated "single-point connection" location.
The above is the "50 Common Questions in PCB Layout" recompiled by the eCloud team. Layout and routing are an art combining circuit theory and practical experience. We hope this list can assist engineers during actual design and prototyping.
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